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IC2 Compact PCI

This course is an extension to the PCI course

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Objectives
  • This course highlights the new hardware features / constraints of CompactPCI with regard to PCI.
  • Hardware and software additional requirements to support hot swap are explained.
  • Implementation of a non-transparent 21554 intel PCI-to-PCI bridge frequently used in Compact PCI systems.
A more detailed course description is available on request at formation@ac6-formation.com
  • Knowledge of PCI 3.0: see our course reference IC1 - PCI 3.0 course
  • Theoretical course
    • PDF course material (in English) supplemented by a printed version for face-to-face courses.
    • Online courses are dispensed using the Teams video-conferencing system.
    • The trainer answers trainees' questions during the training and provide technical and pedagogical assistance.
  • At the start of each session the trainer will interact with the trainees to ensure the course fits their expectations and correct if needed
  • Any embedded systems engineer or technician with the above prerequisites.
  • The prerequisites indicated above are assessed before the training by the technical supervision of the traineein his company, or by the trainee himself in the exceptional case of an individual trainee.
  • Trainee progress is assessed by quizzes offered at the end of various sections to verify that the trainees have assimilated the points presented
  • At the end of the training, each trainee receives a certificate attesting that they have successfully completed the course.
    • In the event of a problem, discovered during the course, due to a lack of prerequisites by the trainee a different or additional training is offered to them, generally to reinforce their prerequisites,in agreement with their company manager if applicable.

Course Outline

  • Backplane design rules
  • Board design rules
  • Clocking
  • Interrupt lines
  • Electrical requirements on the system board
  • Architecture model, compliance levels
  • Hot swap additional signals
  • Insertion & extraction sequences
  • Address decoding
  • Data path inside the bridge
  • Consequences of PCI transaction ordering rules
  • I2O specification objectives, implementation in the 21554